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ISA SBC Video Card, Imagine 128 + s3 968 + i960, WORKING, Witt Biomedical
Appearance: Used
Functionality: Working
Description:
============
As Pictured, a Witt Biomedical 16-Bit ISA SBC / Video Card. Board contains some very unique chips: #9 Imagine 128, S3 Vision968, Intel i960, and appears to have ethernet as well. When plugged in, board functions and displays image (see screenshot). Board seems to be a self-contained computer, not sure if any of the components can be accessed from the host system.
Warranty and Returns:
=====================
This product is being sold AS-IS without any warranty. Returns are not accepted. To ensure that this is the right product for your needs, we’re happy to answer any questions.
Shipping:
=========
- Other shipping methods are available – contact us for details.
- Combined shipping is available for most items – contact us for details.
- Local pickup is also available at no cost.
About Us:
=========
The Computer Preservation Group is dedicated to the preservation of historical computers. To help fund ongoing operations, select items are made available. To learn more, please visit our website: www.computerpreservation.com. Thank you for your support!
Stock#:C3147.GO#1.5
Details from http://www.vogonswiki.com/index.php/S3:
S3 Vision968
High performance GUI accelerators during 1994 and 1995. The family includes the 864, 868, 964 and 968 chips. The 9xx series uses VRAM memory instead of fast-page DRAM, enhancing memory performance and improving high-resolution GUI performance. The x68 chips include motion video acceleration features including color space conversion and video scaling.
Details from https://en.wikipedia.org/wiki/Number_Nine_Visual_Technology:
The Imagine 128 GPU introduced a full 128-bit graphics processor—GPU, internal processor bus, and memory bus were all 128 bits.
Details from https://en.wikipedia.org/wiki/Intel_i960:
Intel's i960 (or 80960) was a RISC-based microprocessor design that became popular during the early 1990s as an embedded microcontroller, becoming a best-selling CPU in that field, along with the competing AMD 29000. In spite of its success, Intel dropped i960 marketing in the late 1990s as a side effect of a settlement with DEC in which Intel received the rights to produce the StrongARM CPU. The processor continues to be used in a few military applications.
Origin
The i960 design was started as a response to the failure of Intel's iAPX 432 design of the early 1980s. The iAPX 432 was intended to directly support high-level languages that supported tagged, protected, garbage-collected memory — such as Ada and Lisp — in hardware. Because of its instruction-set complexity, its multi-chip implementation, and design flaws, the iAPX 432 was very slow in comparison to other processors of its time.
In 1984 Intel and Siemens started a joint project, ultimately called BiiN, to create a high-end fault-tolerant object-oriented computer system programmed entirely in Ada. Many of the original i432 team members joined this project, though a new lead architect, Glenford Myers, was brought in from IBM. The intended market for the BiiN systems were high-reliability computer users such as banks, industrial systems and nuclear power plants.
Intel's major contribution to the BiiN system was a new processor design, influenced by the protected-memory concepts from the i432. The new design included a number of features to improve performance and avoid problems that had led to the downfall of the i432, which resulted in the i960 design. The first 960 processors entered the final stages of design, known as taping-out, in October 1985 and were sent to manufacturing that month, with the first working chips arriving in late 1985 and early 1986.
The BiiN effort eventually failed, due to market forces, and the 960MX was left without a use. Myers attempted to save the design by outlining several subsets of the full capability architecture created for the BiiN system. He tried to convince Intel management to market the i960 (then still known as the "P7") as a general-purpose processor, both in place of the Intel 80286 and i386 (which taped-out the same month as the first i960), as well as the emerging RISC market for Unix systems, including a pitch to Steve Jobs for use in the NeXT system. Competition within and outside of Intel came not only from the i386 camp, but also from the i860 processor, yet another RISC processor design emerging within Intel at the time. Myers was unsuccessful at convincing Intel management to support the i960 as a general-purpose or Unix processor, but the chip found a ready market in early high-performance 32-bit embedded systems.
The lead architect of i960 was superscalarity specialist Fred Pollack who was also the lead engineer of Intel iAPX 432 and the lead architect of the i686 chip Pentium Pro.[2]
Architecture
To avoid the performance issues that plagued the i432, the central i960 instruction-set architecture was a RISC design, only implemented in full in the i960MX, and the memory subsystem was made 33-bits wide — for a 32-bit word and a "tag" bit to indicate protected memory. In many other ways the i960 followed the original Berkeley RISC design, notably in its use of register windows, an implementation-specific number of caches for the per-subroutine registers, allowing for fast routine calls. The competing Stanford University design, MIPS, did not use this system, relying on the compiler to generate optimal subroutine call and return code instead. In common with most 32-bit designs, the i960 has a flat 32-bit memory space, with no memory segmentation. The i960 architecture also anticipated a superscalar implementation, with instructions being simultaneously dispatched to more than one unit within the processor.
Functionality: Working
Description:
============
As Pictured, a Witt Biomedical 16-Bit ISA SBC / Video Card. Board contains some very unique chips: #9 Imagine 128, S3 Vision968, Intel i960, and appears to have ethernet as well. When plugged in, board functions and displays image (see screenshot). Board seems to be a self-contained computer, not sure if any of the components can be accessed from the host system.
Warranty and Returns:
=====================
This product is being sold AS-IS without any warranty. Returns are not accepted. To ensure that this is the right product for your needs, we’re happy to answer any questions.
Shipping:
=========
- Other shipping methods are available – contact us for details.
- Combined shipping is available for most items – contact us for details.
- Local pickup is also available at no cost.
About Us:
=========
The Computer Preservation Group is dedicated to the preservation of historical computers. To help fund ongoing operations, select items are made available. To learn more, please visit our website: www.computerpreservation.com. Thank you for your support!
Stock#:C3147.GO#1.5
Details from http://www.vogonswiki.com/index.php/S3:
S3 Vision968
High performance GUI accelerators during 1994 and 1995. The family includes the 864, 868, 964 and 968 chips. The 9xx series uses VRAM memory instead of fast-page DRAM, enhancing memory performance and improving high-resolution GUI performance. The x68 chips include motion video acceleration features including color space conversion and video scaling.
Details from https://en.wikipedia.org/wiki/Number_Nine_Visual_Technology:
The Imagine 128 GPU introduced a full 128-bit graphics processor—GPU, internal processor bus, and memory bus were all 128 bits.
Details from https://en.wikipedia.org/wiki/Intel_i960:
Intel's i960 (or 80960) was a RISC-based microprocessor design that became popular during the early 1990s as an embedded microcontroller, becoming a best-selling CPU in that field, along with the competing AMD 29000. In spite of its success, Intel dropped i960 marketing in the late 1990s as a side effect of a settlement with DEC in which Intel received the rights to produce the StrongARM CPU. The processor continues to be used in a few military applications.
Origin
The i960 design was started as a response to the failure of Intel's iAPX 432 design of the early 1980s. The iAPX 432 was intended to directly support high-level languages that supported tagged, protected, garbage-collected memory — such as Ada and Lisp — in hardware. Because of its instruction-set complexity, its multi-chip implementation, and design flaws, the iAPX 432 was very slow in comparison to other processors of its time.
In 1984 Intel and Siemens started a joint project, ultimately called BiiN, to create a high-end fault-tolerant object-oriented computer system programmed entirely in Ada. Many of the original i432 team members joined this project, though a new lead architect, Glenford Myers, was brought in from IBM. The intended market for the BiiN systems were high-reliability computer users such as banks, industrial systems and nuclear power plants.
Intel's major contribution to the BiiN system was a new processor design, influenced by the protected-memory concepts from the i432. The new design included a number of features to improve performance and avoid problems that had led to the downfall of the i432, which resulted in the i960 design. The first 960 processors entered the final stages of design, known as taping-out, in October 1985 and were sent to manufacturing that month, with the first working chips arriving in late 1985 and early 1986.
The BiiN effort eventually failed, due to market forces, and the 960MX was left without a use. Myers attempted to save the design by outlining several subsets of the full capability architecture created for the BiiN system. He tried to convince Intel management to market the i960 (then still known as the "P7") as a general-purpose processor, both in place of the Intel 80286 and i386 (which taped-out the same month as the first i960), as well as the emerging RISC market for Unix systems, including a pitch to Steve Jobs for use in the NeXT system. Competition within and outside of Intel came not only from the i386 camp, but also from the i860 processor, yet another RISC processor design emerging within Intel at the time. Myers was unsuccessful at convincing Intel management to support the i960 as a general-purpose or Unix processor, but the chip found a ready market in early high-performance 32-bit embedded systems.
The lead architect of i960 was superscalarity specialist Fred Pollack who was also the lead engineer of Intel iAPX 432 and the lead architect of the i686 chip Pentium Pro.[2]
Architecture
To avoid the performance issues that plagued the i432, the central i960 instruction-set architecture was a RISC design, only implemented in full in the i960MX, and the memory subsystem was made 33-bits wide — for a 32-bit word and a "tag" bit to indicate protected memory. In many other ways the i960 followed the original Berkeley RISC design, notably in its use of register windows, an implementation-specific number of caches for the per-subroutine registers, allowing for fast routine calls. The competing Stanford University design, MIPS, did not use this system, relying on the compiler to generate optimal subroutine call and return code instead. In common with most 32-bit designs, the i960 has a flat 32-bit memory space, with no memory segmentation. The i960 architecture also anticipated a superscalar implementation, with instructions being simultaneously dispatched to more than one unit within the processor.
